1. Field of the Invention
The invention relates to a method for fabricating a thin-film transistor (TFT), and specifically relates to a method for fabricating a self-aligned TFT (more specifically, oxide semiconductor TFT) using a so-called self-alignment process that is performed by irradiating, with an excimer laser light and with the gate electrode as a mask, two outer regions of the oxide semiconductor layer beside a region corresponding to the gate so that the two outer regions are reduced in resistance to form source/drain regions.
2. Description of the Related Art
Non-patent Document 1 discloses an exemplary method for fabricating a self-aligned oxide semiconductor TFT using the self-alignment process as described above. The fabricating method is explained in brief with reference to FIG. 1.
A structure is provided, including a (glass) substrate 62, a gate electrode 64 having a predetermined pattern and a gate insulating film (SiO2) 66 covering the gate electrode 64 on the substrate 62, and an oxide semiconductor layer (In—Ga—Zn—O) 68 formed on the gate insulating film 66. The structure is irradiated with an excimer laser light (XeCl, wavelength: 308 nm) 70 from the side of the substrate 62, so that two outsides (left and right sides) of the region of the oxide semiconductor layer 68 corresponding to the gate electrode 64 (see FIG. 1(A)) are irradiated by the excimer laser light 70, with the gate electrode 64 as a mask, to be reduced in resistance and thereby one of the two outside regions forms a source region 72 and the other one forms a drain region 73 (see FIG. 1(B)). That is, without being irradiated by the excimer laser light 70 the region of the oxide semiconductor layer 68 corresponding to the gate electrode 64 remains unchanged to become a channel region 74. The channel region 74 has the source region 72 and the drain region 73 formed at its two sides. In this way, a self-aligned oxide semiconductor TFT may be fabricated using the self-alignment process. In addition, on top of the source region 72 and the drain region 73, a source electrode 76 and a drain electrode 78 are respectively formed.
In the method for fabricating a TFT by this self-alignment process, as overlap between the source region 72, the drain region 73 and the gate electrode 64 is absent, the parasitic capacitance therebetween may be reduced. Also, since a stable structure may be produced, a TFT with good properties may be obtained, which is an advantage.
Patent Document 1 and Non-patent Document 2 below will be described later.    Patent Document 1: Japanese Unexamined Patent Application Publication No. 2003-69030 (paragraph 0022 and FIG. 1)
Non-Patent Document 1: Mitsuru Nakata, et al., IDW/AD '12 AMD4-4L (Late-News Paper), p. 431-432
Non-Patent Document 2: Hiroki Ohara, et al., AM-FPD '09 Digest, p. 227-230, 2009
Although not mentioned in Non-patent Document 1, as mentioned in Patent Document 1, between the substrate composed of glass or resin, etc. and the gate electrode, the gate insulating film and so on over the substrate for constituting the thin-film transistor, a diffusion prevention film for preventing diffusion of impurities (e.g., alkali metal such as sodium, etc.) from the substrate is usually disposed.
Compared with a silicon oxide (SiO2) film, a silicon nitride (SiN) film is more often used as the diffusion prevention film, for having a higher film density (atomic density) and a finer structure to have a great effect of preventing diffusion of impurities. For example, the atomic density of the SiO2 film is about 2.1 to 2.2 g/cm3, and that of a later-described hydrogenated silicon nitride (SiN:H) film is about 2.4 to 2.8 g/cm3.
A plasma CVD method using SiH4 and NH3 as source gas is commonly used for formation of the above SiN film. The SiN film formed by this method contains a large amount of hydrogen for burying the dangling bonds in the film, and is thus referred to as a hydrogenated silicon nitride (SiN:H) film.
However, a problem is known that when such hydrogenated SiN film is used as the diffusion prevention film in the method for fabricating a TFT by the aforementioned self-alignment process, the excimer laser light cannot be transmitted through the diffusion prevention film and is almost absorbed by the film.
FIG. 4 illustrates an example of a result of measuring light transmittance of various films formed on a glass substrate using a spectrophotometer. A film D is a hydrogenated SiN (SiN:H) film formed by the aforementioned plasma CVD method, and has a very small transmittance (but a very large absorptivity) in the wavelength range of ultraviolet rays. For example, the transmittance is about 2% in the wavelength of 308 nm of the XeCl excimer laser light.
Accordingly, even if intending to fabricate a TFT through the self-alignment process by using an excimer laser light to irradiate a structure having such hydrogenated SiN film as a diffusion prevention film, the emitted laser light may almost be absorbed by the diffusion prevention film and may hardly reach the oxide semiconductor layer. Consequently, not only the source/drain regions cannot be formed, but also problems such as damage to the diffusion prevention film, peeling-off of the film from the substrate, and even breakdown of transistor devices, etc. are caused due to an excessive temperature rise in the diffusion prevention film.